Topic 11: Multicore and manycore programming (Introduction)

Luiz DeRose, Jan Treibig, David Abramson, Alastair Donaldson, William Jalby, Alba Cristina M A De Melo, Tomàs Margalef

    Research output: Chapter in Book/Report/Conference proceedingForeword / PostscriptOther


    Today's compute node architectures leverage impressive performance by offering more parallel resources on the chip as well as on the node level. Among parallel resources are memory interfaces (ccNUMA), cores, caches and data parallel execution units. On the other hand modern multicore designs also exhibit shared resources such as memory bandwidth on the chip level, last level cache bandwidth and capacity, and access to the network interface. An additional performancelimiting factor is the frequently high cost for synchronization. The task to make full use of parallel resources while keeping an eye on the bottlenecks imposed by the shared resources is non-trivial. Common programming models often address issues related to parallel programming in general while not covering topological issues introduced by multi- and manycore architectures. The industry is still pushing forward introducing even more powerful manycore systems like, e.g., the Nvidia Kepler and Intel MIC architectures.

    Original languageEnglish
    Title of host publicationEuro-Par 2013 Parallel Processing
    Subtitle of host publication19th International Conference Aachen, Germany, August 26-30, 2013, Proceedings
    EditorsFelix Wolf, Bernd Mohr, Dieter an Mey
    Number of pages2
    ISBN (Print)9783642400476, 9783642400469
    Publication statusPublished - 2013
    EventInternational European Conference on Parallel Processing 2013 - Aachen, Germany
    Duration: 26 Aug 201330 Aug 2013
    Conference number: 19th (Proceedings)


    ConferenceInternational European Conference on Parallel Processing 2013
    Abbreviated titleEuro-Par 2013
    Internet address

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