Revisiting the reduction circuit: A case study for simultaneous architecture and precision optimisation

David Peter Boland, George A Constantinides

Research output: Chapter in Book/Report/Conference proceedingConference PaperResearchpeer-review

2 Citations (Scopus)
Original languageEnglish
Title of host publicationProceedings of the 2013 International Conference on Field Programmable Technology (FPT)
EditorsHideharu Amano, Yajun Ha, Yoshiki Yamaguchi
Place of PublicationPiscataway NJ USA
PublisherIEEE, Institute of Electrical and Electronics Engineers
Pages410 - 413
Number of pages4
ISBN (Print)9781479921980
DOIs
Publication statusPublished - 2013
Externally publishedYes
EventIEEE International Conference in Field Programmable Technology - Kyoto Japan, Piscataway NJ USA
Duration: 1 Jan 2013 → …

Conference

ConferenceIEEE International Conference in Field Programmable Technology
CityPiscataway NJ USA
Period1/01/13 → …

Cite this

Boland, D. P., & Constantinides, G. A. (2013). Revisiting the reduction circuit: A case study for simultaneous architecture and precision optimisation. In H. Amano, Y. Ha, & Y. Yamaguchi (Eds.), Proceedings of the 2013 International Conference on Field Programmable Technology (FPT) (pp. 410 - 413). IEEE, Institute of Electrical and Electronics Engineers. https://doi.org/10.1109/FPT.2013.6718401