Reducing burn-in time through high-voltage stress test and Weibull statistical analysis

Zainal Abu Kassim, Serge Demidenko

Research output: Contribution to journalArticleResearchpeer-review

40 Citations (Scopus)


High-voltage stress testing (HVST) is common in IC manufacturing, but publications comparing it with other test and burn-in methods are scarce. This article shows that the use of HVST can dramatically reduce the amount of required burn-in.
Original languageEnglish
Pages (from-to)88-98
Number of pages11
JournalIEEE Design and Test of Computers
Issue number2
Publication statusPublished - Mar 2006

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