Modelling of neurone networks in Java and VHDL

Johan Iskandar; John Daumants Zakis

Modelling of neurone networks in Java and VHDL

Johan Iskandar, John Daumants Zakis

Electrical and Computer Systems Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference Paper › Research › peer-review

Original language	English
Title of host publication	2004 IEEE Conference on Cybernetics and Intelligence Systems & Robotics, Automation and Mechatronics
Editors	S S Ge
Place of Publication	Singapore
Publisher	IEEE, Institute of Electrical and Electronics Engineers
Pages	631 - 636
Number of pages	6
ISBN (Print)	0-7803-8644-2
Publication status	Published - 2004
Event	IEEE International Conference on Cybernetics and Intelligent Systems 2004 - Singapore, Singapore, Singapore Duration: 1 Dec 2004 → 3 Dec 2004

Conference

Conference	IEEE International Conference on Cybernetics and Intelligent Systems 2004
Country	Singapore
City	Singapore
Period	1/12/04 → 3/12/04

Cite this

@inproceedings{1163a08e3520406d8f23d1f17064d709,

title = "Modelling of neurone networks in Java and VHDL",

author = "Johan Iskandar and Zakis, {John Daumants}",

year = "2004",

language = "English",

isbn = "0-7803-8644-2",

pages = "631 -- 636",

editor = "Ge, {S S}",

booktitle = "2004 IEEE Conference on Cybernetics and Intelligence Systems & Robotics, Automation and Mechatronics",

publisher = "IEEE, Institute of Electrical and Electronics Engineers",

address = "United States of America",

note = "IEEE International Conference on Cybernetics and Intelligent Systems 2004 ; Conference date: 01-12-2004 Through 03-12-2004",

}

Iskandar, J & Zakis, JD 2004, Modelling of neurone networks in Java and VHDL. in SS Ge (ed.), 2004 IEEE Conference on Cybernetics and Intelligence Systems & Robotics, Automation and Mechatronics. IEEE, Institute of Electrical and Electronics Engineers, Singapore, pp. 631 - 636, IEEE International Conference on Cybernetics and Intelligent Systems 2004, Singapore, Singapore, 1/12/04.

Modelling of neurone networks in Java and VHDL. / Iskandar, Johan; Zakis, John Daumants.

2004 IEEE Conference on Cybernetics and Intelligence Systems & Robotics, Automation and Mechatronics. ed. / S S Ge. Singapore : IEEE, Institute of Electrical and Electronics Engineers, 2004. p. 631 - 636.

Research output: Chapter in Book/Report/Conference proceeding › Conference Paper › Research › peer-review

TY - GEN

T1 - Modelling of neurone networks in Java and VHDL

AU - Iskandar, Johan

AU - Zakis, John Daumants

PY - 2004

Y1 - 2004

M3 - Conference Paper

SN - 0-7803-8644-2

SP - 631

EP - 636

BT - 2004 IEEE Conference on Cybernetics and Intelligence Systems & Robotics, Automation and Mechatronics

A2 - Ge, S S

PB - IEEE, Institute of Electrical and Electronics Engineers

CY - Singapore

T2 - IEEE International Conference on Cybernetics and Intelligent Systems 2004

Y2 - 1 December 2004 through 3 December 2004

ER -