Hybrid phase-locked loop with fast locking time and low spur in a 0.18-um CMOS process

Siheng Zhu, Li-Ming Si, Chao Guo, Junyu Shi, Weiren Zhu

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@article{baa4a61e63c54267866472323bf3009d,

title = "Hybrid phase-locked loop with fast locking time and low spur in a 0.18-um CMOS process",

author = "Siheng Zhu and Li-Ming Si and Chao Guo and Junyu Shi and Weiren Zhu",

year = "2014",

doi = "10.1088/1674-1056/23/7/078401",

language = "English",

volume = "23",

pages = "1 -- 6",

journal = "Chinese Physics B",

issn = "1674-1056",

publisher = "IOP Publishing",

number = "7",

}

TY - JOUR

T1 - Hybrid phase-locked loop with fast locking time and low spur in a 0.18-um CMOS process

AU - Zhu, Siheng

AU - Si, Li-Ming

AU - Guo, Chao

AU - Shi, Junyu

AU - Zhu, Weiren

PY - 2014

Y1 - 2014

UR - http://iopscience.iop.org/1674-1056/23/7/078401/pdf/1674-1056_23_7_078401.pdf

U2 - 10.1088/1674-1056/23/7/078401

DO - 10.1088/1674-1056/23/7/078401

M3 - Article

VL - 23

SP - 1

EP - 6

JO - Chinese Physics B

JF - Chinese Physics B

SN - 1674-1056

IS - 7

ER -