FPGA implementation of a pipelined word-parallel cordic processor for an ultrasonic imaging system

Nandita Bhattacharjee, Andrew Peter Paplinski, Charles Greif

    Research output: Chapter in Book/Report/Conference proceedingConference PaperResearchpeer-review

    Original languageEnglish
    Title of host publicationProceedings of the International Symposium on Intelligent Signal Processing and Communication Systems
    EditorsS Suthaharan, Bin Qiu
    Place of PublicationTennessee USA
    PublisherUniversity of Tennessee
    Pages429 - 433
    Number of pages5
    ISBN (Print)0-9716-6920-1
    Publication statusPublished - 2001
    EventIEEE International Conference on Signal Processing and Communication 2001 - Tennessee, USA, Tennessee USA
    Duration: 1 Jan 2001 → …

    Conference

    ConferenceIEEE International Conference on Signal Processing and Communication 2001
    CityTennessee USA
    Period1/01/01 → …

    Cite this

    Bhattacharjee, N., Paplinski, A. P., & Greif, C. (2001). FPGA implementation of a pipelined word-parallel cordic processor for an ultrasonic imaging system. In S. Suthaharan, & B. Qiu (Eds.), Proceedings of the International Symposium on Intelligent Signal Processing and Communication Systems (pp. 429 - 433). Tennessee USA: University of Tennessee.
    Bhattacharjee, Nandita ; Paplinski, Andrew Peter ; Greif, Charles. / FPGA implementation of a pipelined word-parallel cordic processor for an ultrasonic imaging system. Proceedings of the International Symposium on Intelligent Signal Processing and Communication Systems. editor / S Suthaharan ; Bin Qiu. Tennessee USA : University of Tennessee, 2001. pp. 429 - 433
    @inproceedings{ef307bf555954faab12d34a716777e9a,
    title = "FPGA implementation of a pipelined word-parallel cordic processor for an ultrasonic imaging system",
    author = "Nandita Bhattacharjee and Paplinski, {Andrew Peter} and Charles Greif",
    year = "2001",
    language = "English",
    isbn = "0-9716-6920-1",
    pages = "429 -- 433",
    editor = "S Suthaharan and Bin Qiu",
    booktitle = "Proceedings of the International Symposium on Intelligent Signal Processing and Communication Systems",
    publisher = "University of Tennessee",

    }

    Bhattacharjee, N, Paplinski, AP & Greif, C 2001, FPGA implementation of a pipelined word-parallel cordic processor for an ultrasonic imaging system. in S Suthaharan & B Qiu (eds), Proceedings of the International Symposium on Intelligent Signal Processing and Communication Systems. University of Tennessee, Tennessee USA, pp. 429 - 433, IEEE International Conference on Signal Processing and Communication 2001, Tennessee USA, 1/01/01.

    FPGA implementation of a pipelined word-parallel cordic processor for an ultrasonic imaging system. / Bhattacharjee, Nandita; Paplinski, Andrew Peter; Greif, Charles.

    Proceedings of the International Symposium on Intelligent Signal Processing and Communication Systems. ed. / S Suthaharan; Bin Qiu. Tennessee USA : University of Tennessee, 2001. p. 429 - 433.

    Research output: Chapter in Book/Report/Conference proceedingConference PaperResearchpeer-review

    TY - GEN

    T1 - FPGA implementation of a pipelined word-parallel cordic processor for an ultrasonic imaging system

    AU - Bhattacharjee, Nandita

    AU - Paplinski, Andrew Peter

    AU - Greif, Charles

    PY - 2001

    Y1 - 2001

    M3 - Conference Paper

    SN - 0-9716-6920-1

    SP - 429

    EP - 433

    BT - Proceedings of the International Symposium on Intelligent Signal Processing and Communication Systems

    A2 - Suthaharan, S

    A2 - Qiu, Bin

    PB - University of Tennessee

    CY - Tennessee USA

    ER -

    Bhattacharjee N, Paplinski AP, Greif C. FPGA implementation of a pipelined word-parallel cordic processor for an ultrasonic imaging system. In Suthaharan S, Qiu B, editors, Proceedings of the International Symposium on Intelligent Signal Processing and Communication Systems. Tennessee USA: University of Tennessee. 2001. p. 429 - 433