As critical dimensions of interconnect structures in microelectronic devices decrease below 100 nm, general electrical performance of copper lines is reduced, for example, resistivity is seen to increase. These phenomena are due to the limited size of copper grains within these narrow features. For this reason, control of the copper microstructure at this scale is a fundamental challenge for the fabrication of future circuits. This study focuses on copper grain growth mechanisms in narrow lines after annealing. Grain size measurements and electrical results are presented. Different grain growth regimes are observed, depending on both feature size and annealing temperature.
- Grain growth
- Narrow lines