Dynamic voltage scaling for power aware fast fourier transform (FFT) processor

David Fitrio; Jugdutt Singh; Aleksandar Stojcevski

doi:10.1007/11572961_6

Dynamic voltage scaling for power aware fast fourier transform (FFT) processor

David Fitrio, Jugdutt Singh, Aleksandar Stojcevski

Research output: Chapter in Book/Report/Conference proceeding › Conference Paper › Research › peer-review

Original language	English
Title of host publication	Advances in Computer Systems Architecture
Editors	Thambipillai Srikanthan, Jingling Xue, Chip-Hong Chang
Place of Publication	Germany
Publisher	Springer
Pages	52 - 64
Number of pages	13
Volume	3740/2005
ISBN (Print)	0302-9743
DOIs	https://doi.org/10.1007/11572961_6
Publication status	Published - 2005
Externally published	Yes
Event	IEEE Asia-Pacific Computer Systems Architecture Conference (ACSAC) 2005 - Singapore, Germany Duration: 1 Jan 2005 → …

Conference

Conference	IEEE Asia-Pacific Computer Systems Architecture Conference (ACSAC) 2005
City	Germany
Period	1/01/05 → …

Access to Document

10.1007/11572961_6

Cite this

@inproceedings{2a220de4592c4f3c9c2e5db92fad6d60,

title = "Dynamic voltage scaling for power aware fast fourier transform (FFT) processor",

author = "David Fitrio and Jugdutt Singh and Aleksandar Stojcevski",

year = "2005",

doi = "10.1007/11572961_6",

language = "English",

isbn = "0302-9743",

volume = "3740/2005",

pages = "52 -- 64",

editor = "Thambipillai Srikanthan and Jingling Xue and Chip-Hong Chang",

booktitle = "Advances in Computer Systems Architecture",

publisher = "Springer",

note = "IEEE Asia-Pacific Computer Systems Architecture Conference (ACSAC) 2005 ; Conference date: 01-01-2005",

}

Fitrio, D, Singh, J & Stojcevski, A 2005, Dynamic voltage scaling for power aware fast fourier transform (FFT) processor. in T Srikanthan, J Xue & C-H Chang (eds), Advances in Computer Systems Architecture. vol. 3740/2005, Springer, Germany, pp. 52 - 64, IEEE Asia-Pacific Computer Systems Architecture Conference (ACSAC) 2005, Germany, 1/01/05. https://doi.org/10.1007/11572961_6

Dynamic voltage scaling for power aware fast fourier transform (FFT) processor. / Fitrio, David; Singh, Jugdutt; Stojcevski, Aleksandar.

Advances in Computer Systems Architecture. ed. / Thambipillai Srikanthan; Jingling Xue; Chip-Hong Chang. Vol. 3740/2005 Germany : Springer, 2005. p. 52 - 64.

Research output: Chapter in Book/Report/Conference proceeding › Conference Paper › Research › peer-review

TY - GEN

T1 - Dynamic voltage scaling for power aware fast fourier transform (FFT) processor

AU - Fitrio, David

AU - Singh, Jugdutt

AU - Stojcevski, Aleksandar

PY - 2005

Y1 - 2005

U2 - 10.1007/11572961_6

DO - 10.1007/11572961_6

M3 - Conference Paper

SN - 0302-9743

VL - 3740/2005

SP - 52

EP - 64

BT - Advances in Computer Systems Architecture

A2 - Srikanthan, Thambipillai

A2 - Xue, Jingling

A2 - Chang, Chip-Hong

PB - Springer

CY - Germany

T2 - IEEE Asia-Pacific Computer Systems Architecture Conference (ACSAC) 2005

Y2 - 1 January 2005

ER -