Design of an integrated tunable differential negative resistance in UMC 0.18 μm

A. Richelli, M. Grassi, J.-M. Redouté

Research output: Contribution to journalArticleResearchpeer-review

4 Citations (Scopus)


This paper presents a CMOS floating tunable differential resistance, which has the property of being positive with respect to common-mode signals while being negative for differential signals. The designed circuit is simulated in UMC 180 nm CMOS process: simulations show that the negative differential resistance can be varied in a broad range, from 23.5 kΩ to 3.8 MΩ.

Original languageEnglish
Pages (from-to)1-6
Number of pages6
Publication statusPublished - 1 Feb 2016


  • CMOS integrated circuits
  • Negative differential resistance
  • Small signal analysis

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