Design of an EMI Self-Immune VML Transmitter in 0.18- μm CMOS

Gilbert E. Matig-a, Mehmet R. Yuce, Jean-Michel Redoute

Research output: Contribution to journalLetterResearchpeer-review

Abstract

This letter discusses an integrated voltage-mode logic (VML) transmitter demonstrating a superior self-immunity to electromagnetic interference (EMI). Both the proposed and typical transmitters were fabricated in the UMC 0.18- μm standard CMOS process. Using direct power injection measurement, the typical and proposed VML transmitters were subjected to EMI frequencies ranging from 100 kHz to 2 GHz and amplitudes up to 5-V peak. The proposed VML transmitter maintains an open eye diagram with a minimum eye height of 80 mV at the highest EMI amplitude, whereas the typical VML transmitter’s eye opening completely closes for EMI frequencies from 700 kHz to 300 MHz and for EMI amplitudes exceeding 1.5-V peak.

Original languageEnglish
Pages (from-to)1646-1649
Number of pages4
JournalIEEE Transactions on Electromagnetic Compatibility
Volume59
Issue number5
DOIs
Publication statusPublished - 1 Oct 2017

Cite this

Matig-a, Gilbert E. ; Yuce, Mehmet R. ; Redoute, Jean-Michel. / Design of an EMI Self-Immune VML Transmitter in 0.18- μm CMOS. In: IEEE Transactions on Electromagnetic Compatibility. 2017 ; Vol. 59, No. 5. pp. 1646-1649.
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Design of an EMI Self-Immune VML Transmitter in 0.18- μm CMOS. / Matig-a, Gilbert E.; Yuce, Mehmet R.; Redoute, Jean-Michel.

In: IEEE Transactions on Electromagnetic Compatibility, Vol. 59, No. 5, 01.10.2017, p. 1646-1649.

Research output: Contribution to journalLetterResearchpeer-review

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