TY - JOUR
T1 - Design and development of non-isolated modified SEPIC DC-DC converter topology for high-step-up applications
T2 - Investigation and hardware implementation
AU - Premkumar, Manoharan
AU - Subramaniam, Umashankar
AU - Alhelou, Hassan Haes
AU - Siano, Pierluigi
N1 - Publisher Copyright:
© 2020 by the authors. Licensee MDPI, Basel, Switzerland.
PY - 2020/8/1
Y1 - 2020/8/1
N2 - A new non-isolated modified SEPIC front-end dc-dc converter for the low power system is proposed in this paper, and this converter is the next level of the traditional SEPIC converter with additional devices, such as two diodes and splitting of the output capacitor into two equal parts. The circuit topology proposed in this paper is formulated by combining the boost structure with the traditional SEPIC converter. Therefore, the proposed converter has the benefit of the SEPIC converter, such as continuous input current. The proposed circuit structure also improves the features, such as high voltage gain and high conversion efficiency. The converter comprises one MOSFET switch, one coupled inductor, three diodes, and two capacitors, including the output capacitor. The converter effectively recovers the leakage energy of the coupled inductor through the passive clamp circuit. The operation of the proposed converter is explained in continuous conduction mode (CCM) and discontinuous conduction mode (DCM). The required voltage gain of the converter can be acquired by adjusting the coupled inductor turn’s ratio along with the additional devices at less duty cycle of the switch. The simulation of the proposed converter under CCM is carried out, and an experimental prototype of 100 W, 25 V/200 V is made, and the experimental outcomes are presented to validate the theoretical discussions of the proposed converter. The operating performance of the proposed converter is compared with the converters discussed in the literature. The proposed converter can be extended by connecting voltage multiplier (VM) cell circuits to get the ultra-high voltage gain.
AB - A new non-isolated modified SEPIC front-end dc-dc converter for the low power system is proposed in this paper, and this converter is the next level of the traditional SEPIC converter with additional devices, such as two diodes and splitting of the output capacitor into two equal parts. The circuit topology proposed in this paper is formulated by combining the boost structure with the traditional SEPIC converter. Therefore, the proposed converter has the benefit of the SEPIC converter, such as continuous input current. The proposed circuit structure also improves the features, such as high voltage gain and high conversion efficiency. The converter comprises one MOSFET switch, one coupled inductor, three diodes, and two capacitors, including the output capacitor. The converter effectively recovers the leakage energy of the coupled inductor through the passive clamp circuit. The operation of the proposed converter is explained in continuous conduction mode (CCM) and discontinuous conduction mode (DCM). The required voltage gain of the converter can be acquired by adjusting the coupled inductor turn’s ratio along with the additional devices at less duty cycle of the switch. The simulation of the proposed converter under CCM is carried out, and an experimental prototype of 100 W, 25 V/200 V is made, and the experimental outcomes are presented to validate the theoretical discussions of the proposed converter. The operating performance of the proposed converter is compared with the converters discussed in the literature. The proposed converter can be extended by connecting voltage multiplier (VM) cell circuits to get the ultra-high voltage gain.
KW - Clamp circuit
KW - Coupled inductor
KW - High voltage gain
KW - SEPIC converter
KW - Voltage stress
UR - http://www.scopus.com/inward/record.url?scp=85090803369&partnerID=8YFLogxK
U2 - 10.3390/en13153960
DO - 10.3390/en13153960
M3 - Article
AN - SCOPUS:85090803369
SN - 1996-1073
VL - 13
JO - Energies
JF - Energies
IS - 15
M1 - 3960
ER -