Characterisation of IC packaging interfaces and loading effects

H. C. Yeo, N. Guo, H. Du, W. M. Huang, X. M. Jian

Research output: Contribution to journalArticleResearchpeer-review

Abstract

In IC packaging, the quality of the interfaces such as that between mold compound and silicon is a critical issue in the reliability testing during the manufacturing process and in-service. Weak interfaces have often gone undetected and may become potentially defective at a later stage. Furthermore, the stress due to mechanical or thermal loading may further deteriorate the interface quality, making the interface unreliable. There is a desire to study the interface quality quantitatively, so potential defects can be evaluated and identified early. In this paper, finite element analysis using multilayer interface model is used to study the reflection coefficient from the interface of varying quality. Different conditioning techniques were used to degrade the interface quality. Characterisation of the interface quality of the MC/Si interface was conducted using longitudinal ultrasonic wave propagation with contact transducers. A combined test that measures the reflection coefficient of the interface under stress load was also conducted to quantify the effect of the load. A nondestructive evaluation methodology is proposed that measures the available strength of the interface by using ultrasonic reflection coefficients, and it shows the correlation between the reflection coefficient and available strength of the interface can be developed and used as a quantitative indicator.

Original languageEnglish
Pages (from-to)1892-1897
Number of pages6
JournalMicroelectronics Reliability
Volume46
Issue number9-11
DOIs
Publication statusPublished - Sep 2006
Externally publishedYes

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