An efficient architecture for a 2-D DWT processor

Balachander Ramamurthy, S M Aziz, Joarder Kamruzzaman

    Research output: Chapter in Book/Report/Conference proceedingConference PaperResearchpeer-review

    Original languageEnglish
    Title of host publicationProceedings of ICECE 2004 3rd International Conference on Electrical & Computer Engineering
    EditorsM A Choudhury
    Place of PublicationDhaka Bangladesh
    PublisherICECE 2004 Conference Secretariat, Bangladesh University of Engineering and Technology
    Pages414 - 417
    Number of pages4
    ISBN (Print)9843218044
    Publication statusPublished - 2004
    EventInternational Conference on Electrical and Computer Engineering 2004 - Pan Pacific Sonargaon Hotel, Dhaka , Bangladesh
    Duration: 28 Dec 200430 Dec 2004
    Conference number: 3rd


    ConferenceInternational Conference on Electrical and Computer Engineering 2004
    Abbreviated titleICECE 2004

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