A unique technique for reducing the effects of hot-carrier induced degradations in CMOS bistable circuits for fault tolerant VLSI design

Arran Gazeril Manmohan Das

    Research output: Chapter in Book/Report/Conference proceedingConference PaperResearchpeer-review

    Original languageEnglish
    Title of host publicationTAEECE2013 Proceedings
    EditorsMohammad S Salman, Ihsan Omur Bucak
    Place of PublicationPiscataway NJ USA
    PublisherIEEE, Institute of Electrical and Electronics Engineers
    Pages323 - 328
    Number of pages6
    ISBN (Print)9781467356138
    DOIs
    Publication statusPublished - 2013
    EventInternational Conference on Technological Advances in Electrical, Electronics and Computer Engineering 2013 - Konya, Turkey
    Duration: 9 May 201311 May 2013

    Conference

    ConferenceInternational Conference on Technological Advances in Electrical, Electronics and Computer Engineering 2013
    Abbreviated titleTAEECE 2013
    CountryTurkey
    CityKonya
    Period9/05/1311/05/13

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