A triple integration timing scheme for SPAD time of flight imaging sensors in 130 nm CMOS

Daniel Morrison; Simon Kennedy; Dennis Delic; Mehmet Yuce; Jean-Michel Redoute

doi:10.1109/ICECS.2018.8617939

A triple integration timing scheme for SPAD time of flight imaging sensors in 130 nm CMOS

Daniel Morrison
, Simon Kennedy
, Dennis Delic
, Mehmet Yuce
, Jean-Michel Redoute

Electrical and Computer Systems Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference Paper › Research › peer-review

5 Citations (Scopus)

Abstract

This paper presents a triple integration time-to-amplitude conversion (TAC) scheme for high resolution SPAD time of flight cameras. Two reference integrators are added to the conventional integration based TAC design, allowing the scheme to be resistant to PVT variation, common mode noise and capacitive discharge. An implementation in 130 nm CMOS is presented with experimental validation to show a significant improvement over the traditional single integration scheme. The measured performance shows that the triple integration interpolator has an INL, DNL and RMS jitter of 85.1 ps, 43 ps and 65 ps respectively.

Original language	English
Title of host publication	2018 25th IEEE International Conference on Electronics Circuits and Systems (ICECS)
Editors	Elena Blokhina, Francois Rivet
Place of Publication	Piscataway NJ USA
Publisher	IEEE, Institute of Electrical and Electronics Engineers
Pages	13-16
Number of pages	4
ISBN (Electronic)	9781538695623
ISBN (Print)	9781538691168
DOIs	https://doi.org/10.1109/ICECS.2018.8617939
Publication status	Published - 2018
Event	IEEE International Conference on Electronics, Circuits and Systems 2018 - Bordeaux, France Duration: 9 Dec 2018 → 12 Dec 2018 Conference number: 25th https://ieeexplore.ieee.org/xpl/conhome/8599658/proceeding (Proceedings)

Conference

Conference	IEEE International Conference on Electronics, Circuits and Systems 2018
Abbreviated title	ICECS 2018
Country/Territory	France
City	Bordeaux
Period	9/12/18 → 12/12/18
Internet address	https://ieeexplore.ieee.org/xpl/conhome/8599658/proceeding (Proceedings)

Keywords

Single Photon Avalanche Diode (SPAD)
Time-of-Flight (ToF)
Time-to-Amplitude Conversion (TAC)
Timing

Access to Document

10.1109/ICECS.2018.8617939

Cite this

Morrison, D., Kennedy, S., Delic, D., Yuce, M., & Redoute, J.-M. (2018). A triple integration timing scheme for SPAD time of flight imaging sensors in 130 nm CMOS. In E. Blokhina, & F. Rivet (Eds.), 2018 25th IEEE International Conference on Electronics Circuits and Systems (ICECS) (pp. 13-16). IEEE, Institute of Electrical and Electronics Engineers. https://doi.org/10.1109/ICECS.2018.8617939

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title = "A triple integration timing scheme for SPAD time of flight imaging sensors in 130 nm CMOS",

abstract = "This paper presents a triple integration time-to-amplitude conversion (TAC) scheme for high resolution SPAD time of flight cameras. Two reference integrators are added to the conventional integration based TAC design, allowing the scheme to be resistant to PVT variation, common mode noise and capacitive discharge. An implementation in 130 nm CMOS is presented with experimental validation to show a significant improvement over the traditional single integration scheme. The measured performance shows that the triple integration interpolator has an INL, DNL and RMS jitter of 85.1 ps, 43 ps and 65 ps respectively.",

keywords = "Single Photon Avalanche Diode (SPAD), Time-of-Flight (ToF), Time-to-Amplitude Conversion (TAC), Timing",

author = "Daniel Morrison and Simon Kennedy and Dennis Delic and Mehmet Yuce and Jean-Michel Redoute",

year = "2018",

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booktitle = "2018 25th IEEE International Conference on Electronics Circuits and Systems (ICECS)",

publisher = "IEEE, Institute of Electrical and Electronics Engineers",

address = "United States of America",

note = "IEEE International Conference on Electronics, Circuits and Systems 2018, ICECS 2018 ; Conference date: 09-12-2018 Through 12-12-2018",

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Morrison, D, Kennedy, S, Delic, D, Yuce, M & Redoute, J-M 2018, A triple integration timing scheme for SPAD time of flight imaging sensors in 130 nm CMOS. in E Blokhina & F Rivet (eds), 2018 25th IEEE International Conference on Electronics Circuits and Systems (ICECS). IEEE, Institute of Electrical and Electronics Engineers, Piscataway NJ USA, pp. 13-16, IEEE International Conference on Electronics, Circuits and Systems 2018, Bordeaux, France, 9/12/18. https://doi.org/10.1109/ICECS.2018.8617939

A triple integration timing scheme for SPAD time of flight imaging sensors in 130 nm CMOS. / Morrison, Daniel; Kennedy, Simon; Delic, Dennis et al.
2018 25th IEEE International Conference on Electronics Circuits and Systems (ICECS). ed. / Elena Blokhina; Francois Rivet. Piscataway NJ USA: IEEE, Institute of Electrical and Electronics Engineers, 2018. p. 13-16.

Research output: Chapter in Book/Report/Conference proceeding › Conference Paper › Research › peer-review

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AU - Yuce, Mehmet

AU - Redoute, Jean-Michel

N1 - Conference code: 25th

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N2 - This paper presents a triple integration time-to-amplitude conversion (TAC) scheme for high resolution SPAD time of flight cameras. Two reference integrators are added to the conventional integration based TAC design, allowing the scheme to be resistant to PVT variation, common mode noise and capacitive discharge. An implementation in 130 nm CMOS is presented with experimental validation to show a significant improvement over the traditional single integration scheme. The measured performance shows that the triple integration interpolator has an INL, DNL and RMS jitter of 85.1 ps, 43 ps and 65 ps respectively.

AB - This paper presents a triple integration time-to-amplitude conversion (TAC) scheme for high resolution SPAD time of flight cameras. Two reference integrators are added to the conventional integration based TAC design, allowing the scheme to be resistant to PVT variation, common mode noise and capacitive discharge. An implementation in 130 nm CMOS is presented with experimental validation to show a significant improvement over the traditional single integration scheme. The measured performance shows that the triple integration interpolator has an INL, DNL and RMS jitter of 85.1 ps, 43 ps and 65 ps respectively.

KW - Single Photon Avalanche Diode (SPAD)

KW - Time-of-Flight (ToF)

KW - Time-to-Amplitude Conversion (TAC)

KW - Timing

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BT - 2018 25th IEEE International Conference on Electronics Circuits and Systems (ICECS)

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PB - IEEE, Institute of Electrical and Electronics Engineers

CY - Piscataway NJ USA

T2 - IEEE International Conference on Electronics, Circuits and Systems 2018

Y2 - 9 December 2018 through 12 December 2018

ER -

Morrison D, Kennedy S, Delic D, Yuce M, Redoute JM. A triple integration timing scheme for SPAD time of flight imaging sensors in 130 nm CMOS. In Blokhina E, Rivet F, editors, 2018 25th IEEE International Conference on Electronics Circuits and Systems (ICECS). Piscataway NJ USA: IEEE, Institute of Electrical and Electronics Engineers. 2018. p. 13-16 doi: 10.1109/ICECS.2018.8617939

A triple integration timing scheme for SPAD time of flight imaging sensors in 130 nm CMOS

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Keywords

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