A triple integration timing scheme for SPAD time of flight imaging sensors in 130 nm CMOS

Daniel Morrison, Simon Kennedy, Dennis Delic, Mehmet Yuce, Jean Michel Redoute

Research output: Chapter in Book/Report/Conference proceedingConference PaperOther

Abstract

This paper presents a triple integration time-to-amplitude conversion (TAC) scheme for high resolution SPAD time of flight cameras. Two reference integrators are added to the conventional integration based TAC design, allowing the scheme to be resistant to PVT variation, common mode noise and capacitive discharge. An implementation in 130 nm CMOS is presented with experimental validation to show a significant improvement over the traditional single integration scheme. The measured performance shows that the triple integration interpolator has an INL, DNL and RMS jitter of 85.1 ps, 43 ps and 65 ps respectively.

Original languageEnglish
Title of host publication2018 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018
PublisherIEEE, Institute of Electrical and Electronics Engineers
Pages13-16
Number of pages4
ISBN (Electronic)9781538695623
DOIs
Publication statusPublished - 17 Jan 2019
EventIEEE International Conference on Electronics, Circuits and Systems 2018 - Bordeaux, France
Duration: 9 Dec 201812 Dec 2018
Conference number: 25th

Publication series

Name2018 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018

Conference

ConferenceIEEE International Conference on Electronics, Circuits and Systems 2018
Abbreviated titleICECS 2018
CountryFrance
CityBordeaux
Period9/12/1812/12/18

Keywords

  • Single Photon Avalanche Diode (SPAD)
  • Time-of-Flight (ToF)
  • Time-to-Amplitude Conversion (TAC)
  • Timing

Cite this

Morrison, D., Kennedy, S., Delic, D., Yuce, M., & Redoute, J. M. (2019). A triple integration timing scheme for SPAD time of flight imaging sensors in 130 nm CMOS. In 2018 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018 (pp. 13-16). [8617939] (2018 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018). IEEE, Institute of Electrical and Electronics Engineers. https://doi.org/10.1109/ICECS.2018.8617939
Morrison, Daniel ; Kennedy, Simon ; Delic, Dennis ; Yuce, Mehmet ; Redoute, Jean Michel. / A triple integration timing scheme for SPAD time of flight imaging sensors in 130 nm CMOS. 2018 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018. IEEE, Institute of Electrical and Electronics Engineers, 2019. pp. 13-16 (2018 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018).
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title = "A triple integration timing scheme for SPAD time of flight imaging sensors in 130 nm CMOS",
abstract = "This paper presents a triple integration time-to-amplitude conversion (TAC) scheme for high resolution SPAD time of flight cameras. Two reference integrators are added to the conventional integration based TAC design, allowing the scheme to be resistant to PVT variation, common mode noise and capacitive discharge. An implementation in 130 nm CMOS is presented with experimental validation to show a significant improvement over the traditional single integration scheme. The measured performance shows that the triple integration interpolator has an INL, DNL and RMS jitter of 85.1 ps, 43 ps and 65 ps respectively.",
keywords = "Single Photon Avalanche Diode (SPAD), Time-of-Flight (ToF), Time-to-Amplitude Conversion (TAC), Timing",
author = "Daniel Morrison and Simon Kennedy and Dennis Delic and Mehmet Yuce and Redoute, {Jean Michel}",
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Morrison, D, Kennedy, S, Delic, D, Yuce, M & Redoute, JM 2019, A triple integration timing scheme for SPAD time of flight imaging sensors in 130 nm CMOS. in 2018 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018., 8617939, 2018 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018, IEEE, Institute of Electrical and Electronics Engineers, pp. 13-16, IEEE International Conference on Electronics, Circuits and Systems 2018, Bordeaux, France, 9/12/18. https://doi.org/10.1109/ICECS.2018.8617939

A triple integration timing scheme for SPAD time of flight imaging sensors in 130 nm CMOS. / Morrison, Daniel; Kennedy, Simon; Delic, Dennis; Yuce, Mehmet; Redoute, Jean Michel.

2018 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018. IEEE, Institute of Electrical and Electronics Engineers, 2019. p. 13-16 8617939 (2018 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018).

Research output: Chapter in Book/Report/Conference proceedingConference PaperOther

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AB - This paper presents a triple integration time-to-amplitude conversion (TAC) scheme for high resolution SPAD time of flight cameras. Two reference integrators are added to the conventional integration based TAC design, allowing the scheme to be resistant to PVT variation, common mode noise and capacitive discharge. An implementation in 130 nm CMOS is presented with experimental validation to show a significant improvement over the traditional single integration scheme. The measured performance shows that the triple integration interpolator has an INL, DNL and RMS jitter of 85.1 ps, 43 ps and 65 ps respectively.

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Morrison D, Kennedy S, Delic D, Yuce M, Redoute JM. A triple integration timing scheme for SPAD time of flight imaging sensors in 130 nm CMOS. In 2018 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018. IEEE, Institute of Electrical and Electronics Engineers. 2019. p. 13-16. 8617939. (2018 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018). https://doi.org/10.1109/ICECS.2018.8617939