A real time micro-expression detection system with LBP-TOP on a many-core processor

Xin Rong Soh; Vishnu Monn Baskaran; Adamu Muhammad Buhari; Raphael C.W. Phan

doi:10.1109/APSIPA.2017.8282041

A real time micro-expression detection system with LBP-TOP on a many-core processor

Xin Rong Soh, Vishnu Monn Baskaran, Adamu Muhammad Buhari, Raphael C.W. Phan

Research output: Chapter in Book/Report/Conference proceeding › Conference Paper › Research

5 Citations (Scopus)

Abstract

The implementation of a micro-expression detection system introduces challenges to sustain a real time recognition result. In order to surmount these problems, this paper examines the algorithm of a serial Local Binary Pattern from Three Orthogonal Planes (LBP-TOP) in order to identify the performance limitations for real time system. Videos from SMIC and CASMEII were up sampled to higher resolutions (280×340, 560×680 and 1120×1360) to cater the need of real life implementation. Then, a parallel multicore-based LBP-TOP algorithm is studied as a benchmark. Experimental results show that the parallel LBP-TOP algorithm exhibits 7× and 8× speedup against serial LBP-TOP for SMIC and CASMEII database respectively for the highest tested video resolution utilising 24- logical processor multi-core architecture. To further reduce the computational time, this paper also proposes a many-core parallel LBP-TOP algorithm using Compute Unified Device Architecture (CUDA). In addition, a method is designed to calculate the threads and blocks required to launch the kernel when processing videos from different resolutions. The proposed algorithm increases the performance speedup to 117× and 130× against the serial algorithm for the highest tested resolution videos.

Original language	English
Title of host publication	Proceedings - Ninth Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, APSIPA ASC 2017
Editors	Chang-Su Kim, Wai Lam Hoo
Place of Publication	Piscataway NJ USA
Publisher	IEEE, Institute of Electrical and Electronics Engineers
Pages	309-315
Number of pages	7
ISBN (Electronic)	9781538615423, 9781538615430
ISBN (Print)	9781538615430
DOIs	https://doi.org/10.1109/APSIPA.2017.8282041
Publication status	Published - 2017
Externally published	Yes
Event	Annual Summit and Conference of the Asia-Pacific-Signal-and-Information-Processing-Association (APSIPA) 2017 - Kuala Lumpur, Malaysia Duration: 12 Dec 2017 → 15 Dec 2017 Conference number: 9th https://ieeexplore.ieee.org/xpl/conhome/8270695/proceeding (Proceedings)

Conference

Conference	Annual Summit and Conference of the Asia-Pacific-Signal-and-Information-Processing-Association (APSIPA) 2017
Abbreviated title	APSIPA ASC 2017
Country/Territory	Malaysia
City	Kuala Lumpur
Period	12/12/17 → 15/12/17
Internet address	https://ieeexplore.ieee.org/xpl/conhome/8270695/proceeding (Proceedings)

Keywords

CUDA
GPGPU
LBP-TOP
micro-expression detection
parallel computing

Access to Document

10.1109/APSIPA.2017.8282041

Cite this

Soh, X. R., Baskaran, V. M., Buhari, A. M., & Phan, R. C. W. (2017). A real time micro-expression detection system with LBP-TOP on a many-core processor. In C.-S. Kim, & W. Lam Hoo (Eds.), Proceedings - Ninth Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, APSIPA ASC 2017 (pp. 309-315). IEEE, Institute of Electrical and Electronics Engineers. https://doi.org/10.1109/APSIPA.2017.8282041

Soh, Xin Rong ; Baskaran, Vishnu Monn ; Buhari, Adamu Muhammad et al. / A real time micro-expression detection system with LBP-TOP on a many-core processor. Proceedings - Ninth Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, APSIPA ASC 2017. editor / Chang-Su Kim ; Wai Lam Hoo. Piscataway NJ USA : IEEE, Institute of Electrical and Electronics Engineers, 2017. pp. 309-315

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abstract = "The implementation of a micro-expression detection system introduces challenges to sustain a real time recognition result. In order to surmount these problems, this paper examines the algorithm of a serial Local Binary Pattern from Three Orthogonal Planes (LBP-TOP) in order to identify the performance limitations for real time system. Videos from SMIC and CASMEII were up sampled to higher resolutions (280×340, 560×680 and 1120×1360) to cater the need of real life implementation. Then, a parallel multicore-based LBP-TOP algorithm is studied as a benchmark. Experimental results show that the parallel LBP-TOP algorithm exhibits 7× and 8× speedup against serial LBP-TOP for SMIC and CASMEII database respectively for the highest tested video resolution utilising 24- logical processor multi-core architecture. To further reduce the computational time, this paper also proposes a many-core parallel LBP-TOP algorithm using Compute Unified Device Architecture (CUDA). In addition, a method is designed to calculate the threads and blocks required to launch the kernel when processing videos from different resolutions. The proposed algorithm increases the performance speedup to 117× and 130× against the serial algorithm for the highest tested resolution videos.",

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note = "Publisher Copyright: {\textcopyright} 2017 IEEE. Copyright: Copyright 2018 Elsevier B.V., All rights reserved.; Annual Summit and Conference of the Asia-Pacific-Signal-and-Information-Processing-Association (APSIPA) 2017, APSIPA ASC 2017 ; Conference date: 12-12-2017 Through 15-12-2017",

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Soh, XR, Baskaran, VM , Buhari, AM & Phan, RCW 2017, A real time micro-expression detection system with LBP-TOP on a many-core processor. in C-S Kim & W Lam Hoo (eds), Proceedings - Ninth Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, APSIPA ASC 2017. IEEE, Institute of Electrical and Electronics Engineers, Piscataway NJ USA, pp. 309-315, Annual Summit and Conference of the Asia-Pacific-Signal-and-Information-Processing-Association (APSIPA) 2017, Kuala Lumpur, Malaysia, 12/12/17. https://doi.org/10.1109/APSIPA.2017.8282041

A real time micro-expression detection system with LBP-TOP on a many-core processor. / Soh, Xin Rong; Baskaran, Vishnu Monn ; Buhari, Adamu Muhammad et al.
Proceedings - Ninth Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, APSIPA ASC 2017. ed. / Chang-Su Kim; Wai Lam Hoo. Piscataway NJ USA: IEEE, Institute of Electrical and Electronics Engineers, 2017. p. 309-315.

Research output: Chapter in Book/Report/Conference proceeding › Conference Paper › Research

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AU - Baskaran, Vishnu Monn

AU - Buhari, Adamu Muhammad

AU - Phan, Raphael C.W.

N1 - Conference code: 9th

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N2 - The implementation of a micro-expression detection system introduces challenges to sustain a real time recognition result. In order to surmount these problems, this paper examines the algorithm of a serial Local Binary Pattern from Three Orthogonal Planes (LBP-TOP) in order to identify the performance limitations for real time system. Videos from SMIC and CASMEII were up sampled to higher resolutions (280×340, 560×680 and 1120×1360) to cater the need of real life implementation. Then, a parallel multicore-based LBP-TOP algorithm is studied as a benchmark. Experimental results show that the parallel LBP-TOP algorithm exhibits 7× and 8× speedup against serial LBP-TOP for SMIC and CASMEII database respectively for the highest tested video resolution utilising 24- logical processor multi-core architecture. To further reduce the computational time, this paper also proposes a many-core parallel LBP-TOP algorithm using Compute Unified Device Architecture (CUDA). In addition, a method is designed to calculate the threads and blocks required to launch the kernel when processing videos from different resolutions. The proposed algorithm increases the performance speedup to 117× and 130× against the serial algorithm for the highest tested resolution videos.

AB - The implementation of a micro-expression detection system introduces challenges to sustain a real time recognition result. In order to surmount these problems, this paper examines the algorithm of a serial Local Binary Pattern from Three Orthogonal Planes (LBP-TOP) in order to identify the performance limitations for real time system. Videos from SMIC and CASMEII were up sampled to higher resolutions (280×340, 560×680 and 1120×1360) to cater the need of real life implementation. Then, a parallel multicore-based LBP-TOP algorithm is studied as a benchmark. Experimental results show that the parallel LBP-TOP algorithm exhibits 7× and 8× speedup against serial LBP-TOP for SMIC and CASMEII database respectively for the highest tested video resolution utilising 24- logical processor multi-core architecture. To further reduce the computational time, this paper also proposes a many-core parallel LBP-TOP algorithm using Compute Unified Device Architecture (CUDA). In addition, a method is designed to calculate the threads and blocks required to launch the kernel when processing videos from different resolutions. The proposed algorithm increases the performance speedup to 117× and 130× against the serial algorithm for the highest tested resolution videos.

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Soh XR, Baskaran VM , Buhari AM , Phan RCW. A real time micro-expression detection system with LBP-TOP on a many-core processor. In Kim CS, Lam Hoo W, editors, Proceedings - Ninth Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, APSIPA ASC 2017. Piscataway NJ USA: IEEE, Institute of Electrical and Electronics Engineers. 2017. p. 309-315 doi: 10.1109/APSIPA.2017.8282041

A real time micro-expression detection system with LBP-TOP on a many-core processor

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