A real time micro-expression detection system with LBP-TOP on a many-core processor

Xin Rong Soh, Vishnu Monn Baskaran, Adamu Muhammad Buhari, Raphael C.W. Phan

Research output: Chapter in Book/Report/Conference proceedingConference PaperResearch

Abstract

The implementation of a micro-expression detection system introduces challenges to sustain a real time recognition result. In order to surmount these problems, this paper examines the algorithm of a serial Local Binary Pattern from Three Orthogonal Planes (LBP-TOP) in order to identify the performance limitations for real time system. Videos from SMIC and CASMEII were up sampled to higher resolutions (280×340, 560×680 and 1120×1360) to cater the need of real life implementation. Then, a parallel multicore-based LBP-TOP algorithm is studied as a benchmark. Experimental results show that the parallel LBP-TOP algorithm exhibits 7× and 8× speedup against serial LBP-TOP for SMIC and CASMEII database respectively for the highest tested video resolution utilising 24- logical processor multi-core architecture. To further reduce the computational time, this paper also proposes a many-core parallel LBP-TOP algorithm using Compute Unified Device Architecture (CUDA). In addition, a method is designed to calculate the threads and blocks required to launch the kernel when processing videos from different resolutions. The proposed algorithm increases the performance speedup to 117× and 130× against the serial algorithm for the highest tested resolution videos.

Original languageEnglish
Title of host publicationProceedings - Ninth Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, APSIPA ASC 2017
EditorsChang-Su Kim, Wai Lam Hoo
Place of PublicationPiscataway NJ USA
PublisherIEEE, Institute of Electrical and Electronics Engineers
Pages309-315
Number of pages7
ISBN (Electronic)9781538615423, 9781538615430
ISBN (Print)9781538615430
DOIs
Publication statusPublished - 2017
Externally publishedYes
EventAnnual Summit and Conference of the Asia-Pacific-Signal-and-Information-Processing-Association (APSIPA) 2017 - Kuala Lumpur, Malaysia
Duration: 12 Dec 201715 Dec 2017
Conference number: 9th
https://ieeexplore.ieee.org/xpl/conhome/8270695/proceeding (Proceedings)

Conference

ConferenceAnnual Summit and Conference of the Asia-Pacific-Signal-and-Information-Processing-Association (APSIPA) 2017
Abbreviated titleAPSIPA ASC 2017
CountryMalaysia
CityKuala Lumpur
Period12/12/1715/12/17
Internet address

Keywords

  • CUDA
  • GPGPU
  • LBP-TOP
  • micro-expression detection
  • parallel computing

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