A Generic EMI-Immune Technique for Differential Amplifiers With Single-Ended Output

Anjan Kumar Pudi N S; Jean-Michel Redoute; Maryam Shojaei Baghini

doi:10.1109/TEMC.2017.2759785

A Generic EMI-Immune Technique for Differential Amplifiers With Single-Ended Output

Anjan Kumar Pudi N S, Jean-Michel Redoute, Maryam Shojaei Baghini

Electrical and Computer Systems Engineering

Research output: Contribution to journal › Article › Research › peer-review

6 Citations (Scopus)

Abstract

This paper presents a unique methodology to calculate the filtering capacitances of the OpAmp already reported in the literature. The methodology aims to show that there is an optimal solution that can be used to increase the electromagnetic interference (EMI) immunity of any OpAmp for a wide range of frequencies. By using this proposed methodology, an OpAmp structure that reduces the EMI effect is designed in standard <formula><tex>$0.18\ \mu \text{m}$</tex></formula> mixed-mode CMOS technology. Detailed mathematical analyses and simulation results are presented and discussed. Simulation results show that the maximum EMI-induced offset voltage in the frequency range from 1 MHz to 1 GHz for the OpAmp is 4.4 mV. In contrast, the standard Miller OpAmp exhibits a maximum EMI-induced offset voltage of 92.4 mV under the same operating conditions.

Original language	English
Pages (from-to)	958-964
Number of pages	7
Journal	IEEE Transactions on Electromagnetic Compatibility
Volume	60
Issue number	4
DOIs	https://doi.org/10.1109/TEMC.2017.2759785
Publication status	Published - 1 Aug 2018

Keywords

Capacitance
Capacitors
CMOS
Electromagnetic interference
electromagnetic interference (EMI) immunity
Immunity testing
Load modeling
Logic gates
Transistors

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10.1109/TEMC.2017.2759785

Cite this

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title = "A Generic EMI-Immune Technique for Differential Amplifiers With Single-Ended Output",

abstract = "This paper presents a unique methodology to calculate the filtering capacitances of the OpAmp already reported in the literature. The methodology aims to show that there is an optimal solution that can be used to increase the electromagnetic interference (EMI) immunity of any OpAmp for a wide range of frequencies. By using this proposed methodology, an OpAmp structure that reduces the EMI effect is designed in standard \$0.18\textbackslash{} \textbackslash{}mu \textbackslash{}text\{m\}\$ mixed-mode CMOS technology. Detailed mathematical analyses and simulation results are presented and discussed. Simulation results show that the maximum EMI-induced offset voltage in the frequency range from 1 MHz to 1 GHz for the OpAmp is 4.4 mV. In contrast, the standard Miller OpAmp exhibits a maximum EMI-induced offset voltage of 92.4 mV under the same operating conditions.",

keywords = "Capacitance, Capacitors, CMOS, Electromagnetic interference, electromagnetic interference (EMI) immunity, Immunity testing, Load modeling, Logic gates, Transistors",

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KW - electromagnetic interference (EMI) immunity

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KW - Load modeling

KW - Logic gates

KW - Transistors

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A Generic EMI-Immune Technique for Differential Amplifiers With Single-Ended Output

Abstract

Keywords

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