A fast algorithm for prime number generation using dynamically reconfigurable logic

Michael Saleeba, Ronald D Pose

Research output: Chapter in Book/Report/Conference proceeding › Conference Paper › Research › peer-review

Original language	English
Title of host publication	Computer Architecture '96 Selected Papers of the 1st Australasian Conference
Place of Publication	Singapore
Publisher	Springer-Verlag London Ltd.
Pages	95 - 109
Number of pages	15
ISBN (Print)	981-3083-10-7
Publication status	Published - 1997
Event	1st Australasian Conference in Computer Architecture '96 - Melbourne Australia, Singapore Duration: 1 Jan 1997 → … Conference number: 1

Conference	1st Australasian Conference in Computer Architecture '96
City	Singapore
Period	1/01/97 → …

Cite this

@inproceedings{d16e2309358a4585aff0ba577a1a97f5,

title = "A fast algorithm for prime number generation using dynamically reconfigurable logic",

author = "Michael Saleeba and Pose, {Ronald D}",

year = "1997",

language = "English",

isbn = "981-3083-10-7",

pages = "95 -- 109",

booktitle = "Computer Architecture '96 Selected Papers of the 1st Australasian Conference",

publisher = "Springer-Verlag London Ltd.",

address = "Germany",

note = "1st Australasian Conference in Computer Architecture '96 ; Conference date: 01-01-1997",

}

TY - GEN

T1 - A fast algorithm for prime number generation using dynamically reconfigurable logic

AU - Saleeba, Michael

AU - Pose, Ronald D

N1 - Conference code: 1

PY - 1997

Y1 - 1997

M3 - Conference Paper

SN - 981-3083-10-7

SP - 95

EP - 109

BT - Computer Architecture '96 Selected Papers of the 1st Australasian Conference

PB - Springer-Verlag London Ltd.

CY - Singapore

T2 - 1st Australasian Conference in Computer Architecture '96

Y2 - 1 January 1997

ER -